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Burn in process with new firmware?
#19
[The long-overdue follow-up to post #16...]

When it's powered up or comes out of a hardware reset, the processor starts fetching instructions from a known location (address) in program memory.  This might be non-volatile memory built into the processor itself, or external memory that's been programmed by the system manufacturer.

This first set of instructions might be the complete program that the system runs indefinitely, or it might be a boot loader that loads the "real" program into writable memory (RAM) and then starts running it.  In some systems the initial program might copy itself from the non-volatile memory into RAM for performance reasons since RAM tends to be faster to access than flash memory.  In other sytems - usually simpler ones - the program runs entirely from the original non-volatile boot memory.

Once up and running, the processor will be continually accessing memory both to fetch instructions and to read or write data as directed by the program.  The instructions and data might or might not be in the same memory device, depending on the processor architecture and system design.

When the processor accesses a location memory it presents an address to the memory device; this could be the address of an instruction in program memory, or of a variable in data memory.  The address is typically a 16-, 24- or 32-bit binary value calculated by the program.  It uniquely identifies a particular location in memory.

The memory device accepts this address and uses it to find the value stored in memory.  The way this is done depends on the memory technology and how its organised. For example the address is often broken into two parts which are used as "co-ordinates" of a two-dimensional array.  Where they intersect is the memory location (word) being addressed.  If the processor is reading, the memory returns the value in this memory location to the processor; otherwise, the memory accepts the value being written by the processor and stores it in the addressed location.  In both cases the value is transferred on a data bus which is typically 8, 16, or 32 bits wide.

The actual memory technology used for storing programs might depend on whether it's on-chip or off-chip.  Off-chip memory will almost certainly be a variant of flash memory these days, but it might be one of two main types: NOR flash or NAND flash.  NOR is easier for the processor to use as it directly addressed and word-oriented (like traditional RAM) and is usually assumed to be error-free.  NAND flash behaves a bit more like a disc drive: it supports larger amounts of storage, is block-oriented and can have errors, though it usually also contains error correction mechanisms.  Processors can't normally run programs directly from NAND flash unless they include special "execute in place" hardware.  For on-chip program storage, either NOR flash or factory-programmed ROM is normally used.

As well as non-volatile program memory, the system also has to have normal read/write memory for storing variables and data that change as the program runs.  Again there are choices here: the most likely technologies are either static RAM (SRAM) or synchronous dynamic RAM (SDRAM).  SRAM is much simpler to work with and has lower power consumption, but gets expensive for large amounts of storage.  SDRAM is the memory that's usually found in a desktop or laptop computer: it supports larger amounts of memory but is power-hungry and complicated.

There is a problem: memory devices, especially flash memory, usually have quite long access times compared to the rate at which the internal parts of a typical modern microprocessor can operate.  If the processor always had to access external memory for each instruction fetch or data access it would run very slowly.  This is the so-called "memory bottleneck".  To overcome this, processors often make use of caches (very fast, on-chip memories) to store frequently/recently-used instructions or data.  There may even be multiple levels of cache, the fastest and smallest being integrated on the chip, and slower/larger external (level 2) cache outside the chip.  The cache(s) will be designed carefully to suit the processor and there are many subtly different design approaches.

Although using caches can improve the performance of a system it can also make it more variable and hard to predict.  For example in a system that has to respond to external events like arrival of data from Ethernet or USB, the code that runs to handle these events can "knock" out of the cache other code or data that might be involved with audio processing.  In a system that wasn't designed very carefully that could sometimes cause the audio processing to miss samples depending on the exact timing of things happening in the outside world.

The SHARC processor (used in Devialets) has a Harvard memory architecture so instructions and data live in separate memories which operate indpendently in parallel.  That helps to reduce the effect of the memory bottleneck, but caches are still used.

I haven't poked around inside a Devialet to find out what type of program and data memory it uses - that would be an interesting exercise.  Maybe Antoine knows already!
Roon (Mac Mini), Wilson Benesch Full Circle, Expert 1000 Pro CI, Kaiser Chiara
Warwickshire, UK
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Messages In This Thread
Burn in process with new firmware? - by yabaVR - 12-Oct-2016, 17:30
RE: Burn in process with new firmware? - by thumb5 - 30-Oct-2016, 19:34

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