Core Infinity listening impressions and comparisons

[Confused]

Yes, I got confirmation that all sources get their clock (improved) from the CI board, therefore improvement in applicable for every entry, not only to the Air/Streaming.

Jean-Marie

This would appear to be consistent with the information @Celts88 posted a while back.  To be honest, I am not sure if this is good news.  Consider that the reason devices like the Mutec MC3+USB and Mutec REF10 can deliver such good results is because the AES/EBU input is a synchronous input, so it derives it's clock from the source feed.  However, if the AES/EBU input is now deriving it's clock from the CI board then it is effectively configured as an asynchronous input, thus removing the potential for 'super clock' devices like the Mutec REF10 to deliver the clock signal.

Strange though, how could that work?
Surely the SPDIF and AES/EBU input have to be clocked by the source to maintain long term synchronisation. Trying to use 2 slightly different clocks was a source of early AIR dropout problems iirc.
Since there is no mechanism to send timing data back from the Devialet clock to the supplying source in the AES/EBU standard (or any way for the source to synchronise thus anyway) I think there much have been some misunderstanding somewhere.

There was much discussion regarding this topic on Computer Audiophile.  John Swenson made an interesting comment stating that there are different mechanisms for recovering the AES clock from the feed, these vary from DAC to DAC. This is John Swenton's description of how a Mutec MC3+USB functions:

Both USB and S/PDIF inputs have their own clocks which run their respective chips. The outputs from these fill a FIFO in the FPGA, clocked by their own clocks. The samples are read from the FIFO using the output of the synthesizer.  The FPGA reads information from the receiver and sets the synthesizer to the correct frequency for the sample rate being received. The FPGA keeps track of the FIFO, if it is getting too full or too empty it changes the output frequency of the synthesizer by a tiny amount to keep the FIFO around half full. This means that the overall average sample rate is controlled by the input source, the quality of the clock generating the output stream is determined by the reference to the synthesizer. Thus a better reference (such as the Ref10) will lower the phase noise of the output data.

In a later post, John made this specific point regarding Devialet: 

The circuitry used to generate clocking in a DAC from a S/PDIF (AES3 etc) feed vary radically from DAC to DAC. There are many different ways to do it and they all have very different "clock transfer functions", how the quality of the input signal affects the clock feeding the DAC chip. I have no idea how the Devialet does it so I can't come up with even a speculation as to what that transfer function might be.

So in conclusion, yes you must be correct, there is no mechanism to send timing data back from the Devialet clock to the supplying source in the AES/EBU standard.  However, exactly what the Devialet does with the AES feed remains unclear, to those of us outside of Devialet at least.

Link to the CA thread:

https://www.computeraudiophile.com/forum...ck/?page=7

This is going a little off topic here, but does have some relevance to the subjective observations from some that the S/PDIF / AES inputs have improved performance following the CI upgrade.  I know a few people have delayed the CI board update to the new year, hopefully we will get a few more reports and insight over the coming months.