How to improve Jitter issue via USB/ETHERNET ?

[Celts88]

For reference, here's an interesting thread from the Roon forum: https://community.roonlabs.com/t/raat-an...rship/6915, originally linked by @Confused in his streaming set-up thread.

Brian Luczkiewicz's (Roon) clear and comprehensive explanations in posts 38 and 41 of that thread and Andrew P's (of dCS) in posts 48 and 53 should be "required reading".

Very interesting and documenting very well why in a properly engineered system, the DAC clock is the only one that can affect SQ in a different manner than just skipping or shuttering. 

Jean-Marie

Jean-Marie

Would the new Clock (or whatever it is inside the Core Infinity) now have overall impact on the SQ being produced by the upgraded Pro's?

A reply I previously had from Devialet in regards to the CI and Clock was:

"The Core Infinity board will effectively be the one to generate and distribute the purest clock signals, including the word clock. Those signals are then rerouted on the motherboard."

Cheers
John