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Full Version: Core Infinity listening impressions and comparisons
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@smokejumper Thanks for your input. Till now from what I have gathered the issue is confined to a few source components like the SOtM-200 Ultra, and Auralic Aries.
(22-Dec-2017, 11:00)smokejumper Wrote: [ -> ]Listening to my 1000 Pro after the Core Infinity upgrade, I think there is, for me at least, a significant uptick on everything I listened to so far. I used the USB and Coaxial SP/DIF inputs and both had even better speed, definition and tonal balance. Didn't get chance to try AIR or UPnP yet.

Thanks for posting @smokejumper.  I will be honest, but when I read the first couple of listening impression posts in this thread which claimed there were sound quality improvements from the AES/EBU or S/PDIF inputs, I was deeply sceptical.  Improvements via the OS Board, maybe, but via S/PID or AES/EBU?  Not very likely I thought.  However, you post is yet another claiming the same thing, it is becoming quite a consistent message now from a few members of the forum.  I know there are some theories as to why this might be, I just wish someone could extract some hard facts from Devialet on this issue.  (and I mean hard facts, not the kind of techno babble waffle you might get from a Devialet support query)

It is good news nevertheless.
Originally it was advised that the CI board would be installed by the Dealer, but then this changed to Paris or designated workshops (e.g. USA, Canada, Australia, etc.). There was also mention about some 'additional tweaks' required, not just installation of the CI Board.

May be these 'tweaks' are the reason for the S/PDIF & AES/EBU SQ uplifts?
(23-Dec-2017, 10:52)Celts88 Wrote: [ -> ]Originally it was advised that the CI board would be installed by the Dealer, but then this changed to Paris or designated workshops (e.g. USA, Canada, Australia, etc.). There was also mention about some 'additional tweaks' required, not just installation of the CI Board.

May be these 'tweaks' are the reason for the S/PDIF & AES/EBU SQ uplifts?

Absolutely, that is exactly what I am thinking.  Furthermore, this could relate to clock implementation.  As someone thinking of splashing out on a Mutec REF10 next year, I would like know exactly what they have done and the implications for this on the AES clock extraction.  All we can do for now is speculate and experiment.
(23-Dec-2017, 11:00)Confused Wrote: [ -> ]
(23-Dec-2017, 10:52)Celts88 Wrote: [ -> ]Originally it was advised that the CI board would be installed by the Dealer, but then this changed to Paris or designated workshops (e.g. USA, Canada, Australia, etc.). There was also mention about some 'additional tweaks' required, not just installation of the CI Board.

May be these 'tweaks' are the reason for the S/PDIF & AES/EBU SQ uplifts?

Absolutely, that is exactly what I am thinking.  Furthermore, this could relate to clock implementation.  As someone thinking of splashing out on a Mutec REF10 next year, I would like know exactly what they have done and the implications for this on the AES clock extraction.  All we can do for now is speculate and experiment.

Confused

Anything to do with this CI Board Generates Clock Signal
(23-Dec-2017, 11:16)Celts88 Wrote: [ -> ]
(23-Dec-2017, 11:00)Confused Wrote: [ -> ]
(23-Dec-2017, 10:52)Celts88 Wrote: [ -> ]Originally it was advised that the CI board would be installed by the Dealer, but then this changed to Paris or designated workshops (e.g. USA, Canada, Australia, etc.). There was also mention about some 'additional tweaks' required, not just installation of the CI Board.

May be these 'tweaks' are the reason for the S/PDIF & AES/EBU SQ uplifts?

Absolutely, that is exactly what I am thinking.  Furthermore, this could relate to clock implementation.  As someone thinking of splashing out on a Mutec REF10 next year, I would like know exactly what they have done and the implications for this on the AES clock extraction.  All we can do for now is speculate and experiment.

Confused

Anything to do with this CI Board Generates Clock Signal
Yes indeed, although note that I wrote in my earlier post "and I mean hard facts, not the kind of techno babble waffle you might get from a Devialet support query".  I am not saying the information you linked to is wrong, but it might not be 100% accurate either, and therefore misleading.  So what I would like is a five minute session with Devialet's Mr Mathieu Pernot, or maybe a white paper with clock diagrams.  I think the Devialet support staff sometimes get answers from the technical team, which they then pass on without fully understanding what they are writing, and the technical message gets lost a little.  At the time of writing though, the information per you link is just about all we have!
(23-Dec-2017, 11:55)Confused Wrote: [ -> ]
(23-Dec-2017, 11:16)Celts88 Wrote: [ -> ]
(23-Dec-2017, 11:00)Confused Wrote: [ -> ]Absolutely, that is exactly what I am thinking.  Furthermore, this could relate to clock implementation.  As someone thinking of splashing out on a Mutec REF10 next year, I would like know exactly what they have done and the implications for this on the AES clock extraction.  All we can do for now is speculate and experiment.

Confused

Anything to do with this CI Board Generates Clock Signal
Yes indeed, although note that I wrote in my earlier post "and I mean hard facts, not the kind of techno babble waffle you might get from a Devialet support query".  I am not saying the information you linked to is wrong, but it might not be 100% accurate either, and therefore misleading.  So what I would like is a five minute session with Devialet's Mr Mathieu Pernot, or maybe a white paper with clock diagrams.  I think the Devialet support staff sometimes get answers from the technical team, which they then pass on without fully understanding what they are writing, and the technical message gets lost a little.  At the time of writing though, the information per you link is just about all we have!

Confused

Totally agree with you, and it's disappointing that Devialet haven't came out with a White Paper or more detailed info on the CI Board

FYI the info regarding the CI Board and clocking was given to me by one of the Engineers involved in the CI board upgrade installations (not saying that explains everything, but it wasn't info just passed down by the Devialet Customer Support Staff). This isn't to say the info is actually how it reads, as there may be some discrepancy due to French / English language, but it does seem as if something regarding clocking has been incorporated on the CI.
(23-Dec-2017, 12:08)Celts88 Wrote: [ -> ]
(23-Dec-2017, 11:55)Confused Wrote: [ -> ]
(23-Dec-2017, 11:16)Celts88 Wrote: [ -> ]Confused

Anything to do with this CI Board Generates Clock Signal
Yes indeed, although note that I wrote in my earlier post "and I mean hard facts, not the kind of techno babble waffle you might get from a Devialet support query".  I am not saying the information you linked to is wrong, but it might not be 100% accurate either, and therefore misleading.  So what I would like is a five minute session with Devialet's Mr Mathieu Pernot, or maybe a white paper with clock diagrams.  I think the Devialet support staff sometimes get answers from the technical team, which they then pass on without fully understanding what they are writing, and the technical message gets lost a little.  At the time of writing though, the information per you link is just about all we have!

Confused

Totally agree with you, and it's disappointing that Devialet haven't came out with a White Paper or more detailed info on the CI Board

FYI the info regarding the CI Board and clocking was given to me by one of the Engineers involved in the CI board upgrade installations (not saying that explains everything, but it wasn't info just passed down by the Devialet Customer Support Staff). This isn't to say the info is actually how it reads, as there may be some discrepancy due to French / English language, but it does seem as if something regarding clocking has been incorporated on the CI.

Considering that the information per you link is from a Devialet engineer, and adding to this the recent subjective listening impressions which are fairly consistent with clock improvements, this is a very intriguing combination.  There is a risk of putting 2 +2 together hear and getting 5 though.  I would love to know more!
What I don't get with Devialet is that if there is master clocking being carried on the CI board, and this is adding to the overall SQ then why not come out and broadcast this feature - it can only be taken as a positive so why hide if it is the case.

Now I understand it may not be talked about as it may not even exist, but Devialet isn't the best with communicating the features of CI, and never seems to talk about SQ (now or in the past). If the SQ is improved then that's great for all, but more info from Devialet would be appreciated.

Was Oxford Audio not going to have a 'Show and Tell Night' for the CI board, with a Senior Devialet Rep being present to discuss (or I may be mistaken).
(24-Dec-2017, 07:25)Celts88 Wrote: [ -> ]What I don't get with Devialet is that if there is master clocking being carried on the CI board, and this is adding to the overall SQ then why not come out and broadcast this feature - it can only be taken as a positive so why hide if it is the case.

Now I understand it may not be talked about as it may not even exist, but Devialet isn't the best with communicating the features of CI, and never seems to talk about SQ (now or in the past). If the SQ is improved then that's great for all, but more info from Devialet would be appreciated.

Was Oxford Audio not going to have a 'Show and Tell Night' for the CI board, with a Senior Devialet Rep being present to discuss (or I may be mistaken).

The Oxford Audio event was postponed I believe, which makes sense I guess, would want to do the big CI board launch presentation before the thing was working correctly and reasonable bug free?

Maybe @oxfordaudio will check in some time and give us some good news..... Shy
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